A semiconductor under insulator technology in indium phosphide

Download
  1. Get@NRC: A semiconductor under insulator technology in indium phosphide (Opens in a new window)
DOIResolve DOI: http://doi.org/10.1063/1.4760231
AuthorSearch for: ; Search for: ; Search for: ; Search for: ; Search for: ; Search for:
TypeArticle
Journal titleApplied Physics Letters
ISSN0003-6951
Volume101
Issue151120
AbstractThis letter introduces a semiconductor-under-insulator (SUI) technology in InP for designing strip waveguides that interfaceInPphotonic crystal membrane structures. Strip waveguides in InP-SUI are supported under an atomic layer deposited insulator layer in contrast to strip waveguides in silicon supported oninsulator. We show a substantial improvement in optical transmission when using InP-SUI strip waveguides interfaced with localized photonic crystal membrane structures when compared with extended photonic crystal waveguide membranes. Furthermore, SUI makes available various fiber-coupling techniques used in SOI, such as sub-micron coupling, for planar membrane III-V systems.
Publication date
LanguageEnglish
AffiliationNational Research Council Canada; Security and Disruptive Technologies; Information and Communication Technologies
Peer reviewedYes
NPARC number21269061
Export citationExport as RIS
Report a correctionReport a correction
Record identifierc17d99ba-6d54-4401-80e1-a95ea9a2849a
Record created2013-12-04
Record modified2016-05-09
Bookmark and share
  • Share this page with Facebook (Opens in a new window)
  • Share this page with Twitter (Opens in a new window)
  • Share this page with Google+ (Opens in a new window)
  • Share this page with Delicious (Opens in a new window)